University of California, Riverside

Department of Electrical and Computer Engineering

Murali Annavaram - A Talk on "GPU Register File Virtualization"

Murali Annavaram - A Talk on "GPU Register File Virtualization"

Murali Annavaram - A Talk on "GPU Register File Virtualization"

November 2, 2015 - 11:10 am
Winston Chung Hall, 205/206


To support massive number of parallel thread contexts, Graphics Processing Units (GPUs) use a huge register file, which is responsible for a large fraction of GPU’s total power and area. The conventional belief is that a large register file is inevitable for accommodating more parallel thread contexts. In this talk, we demonstrate that the register file size need not be large to accommodate more threads contexts. We first characterize the useful lifetime of a register and show that register lifetimes vary drastically across various registers that are allocated to a kernel. While some registers are alive for the entire duration of the kernel execution, some registers have a short lifespan. We propose GPU register file virtualization that allows multiple warps to share physical registers. Since warps may be scheduled for execution at different points in time, we propose to proactively release dead registers from one warp and re-allocate them to a different warp that may occur later in time, thereby reducing the needless demand for physical registers. By using register virtualization, we shrink the architected register space to a smaller physical register space thereby reducing dynamic and static power consumption. Our evaluation shows that even after halving the architected register file size using our proposed GPU register file virtualization applications run with negligible performance overhead. 


Murali Annavaram has been a faculty member in the Ming-Hsieh Department of Electrical Engineering at the University of Southern California from 2007. He currently holds the Robert G. and Mary G. Lane Early Career Chair. His research focuses on energy efficiency and reliability of computing platforms. His group also works on energy efficient sensor management for body area sensor networks for continuous and real-time health monitoring. Murali received NSF CAREER award in 2010 and an IBM Faculty Partnership award in 2009. Prior to his appointment at USC, he was a senior research scientist at the Intel Microprocessor Research Labs from 2001 to 2007 working on energy efficient server design and 3D stacking architectures. In 2007 he was a visiting researcher at the Nokia Research Center, Palo Alto working on virtual trip line based traffic sensing. He received the Ph.D. degree in Computer Engineering from the University of Michigan, Ann Arbor, in 2001. He is a Senior Member of IEEE and ACM. More info at



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