University of California, Riverside

Department of Electrical and Computer Engineering



New Grant from DARPA Funds VLSI Reliability Research at VSCLAB.


New Grant from DARPA Funds VLSI Reliability Research at VSCLAB.
 
Tan

New Grant from DARPA Funds VLSI Reliability Research at VSCLAB.

February 11, 2016

A new $460K grant from the Defense Advanced Research Projects Agency (DARPA), Microsystems Technology Office (MTO) was received by Professor Sheldon Tan of VLSI System and Computational Lab at UCR for developing new physics-based compact electro migration (EM) reliability models and assessment techniques for VLSI interconnects. The project is part of the Integrity and Reliability of Integrated circuitS (IRIS) Program Phase III in DARPA. Dr. Tan’s team will focus on developing physics based models and analysis techniques for the back end of the line (BEOL) reliability effects, especially the electro migration effects for copper interconnects in VLSI chips.  

 

Prof. Tan’s group has been working on the VLSI reliability for the past 5 years and is now well-recognized leading research team in this field worldwide. Together with industry partner, his group developed a number of novel physics-based EM models and full-chip assessment techniques. The new techniques (two Best Paper Award Nominations and One SRC collaboration awards) have potential to replace the status quo techniques used in the semiconductor industry and will be used in the next generation electronic design automation tools for future VLSI design.

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